[Lowfer] LF Xtal on eBay

[Bill Ashlock]

>I guess coming up with a divide by 28 counter is a stickler.

 

All digital divider enthusiasts:

 

I was being a bit sarcastic with that line above. With all the knowledge around on how to divide 5.185MHz down to 185.3K (plus a little Xtal pulling with a series trimmer) I'm surprised that few are doing it. My usual way of dividing by 28 is to use the super-inexpensive 74AC161 wired for a divide by 14 and then a follow-up dual FF like a 74AC74 (using only one section). BTW the divide by 2 (or 4) should be second in line in order to produce the glitch-free symmetrical output required by the final.

 

......So come and take a jump into the Grabulated watering hole!! The more the merrier :)

 

Bill

 
> Date: Thu, 23 Apr 2009 12:20:12 -0500
> From: mikea at mikea.ath.cx
> To: lowfer at mailman.qth.net
> Subject: Re: [Lowfer] LF Xtal on eBay
> 
> On Thu, Apr 23, 2009 at 12:41:46PM -0400, Bill Ashlock wrote:
> > 
> > Hi Peter,
> > 
> > 
> > 
> > I usually figure a .1% 'pull factor' is all one can hope for using
> > a series capacitor or inductor. That Xtal, therefore, would fall
> > short of 185.3 by quite a bit. I keep preaching a 5.185 MHz 60 cent
> > microprocessor Xtal divided by 28 works very well but I guess coming
> > up with a divide by 28 counter is a stickler.
> 
> Divide by 28 is just divide by (4*7). Divide by 4 is trivial, and divide
> by 7 is only a tiny bit less so. I can think of three good ways to do it
> right off the top of my head, and I don't doubt the real EE-for-pay
> folks on the list can come up with others. 
> 
> The commercial divide-by-7 counters I've seen have used a 3-bit counter
> (discrete flipflops) with the "1" outputs ANDed together to form a
> RESET input to all three bits. That way, as soon as all bits go to "1",
> all three flipflops are jammed to "0". If you do this with the output
> of the divide-by-4, then the divide-by-7 counter only has to work at
> 5.185/4 MHz (1296.25 KHz) clock rate, which is pretty slow, and all
> you have to worry about is getting the flipflops reset quickly enough:
> there will, inescapably, be some time during which the counter is in an
> all-"1" state, before the RESET pulse jams the flopflops to all="0", but
> the duration depends on the speed of the logic you choose. You could,
> alternatively, detect an all-"0" state and jam the flipflop state to
> "001", but that's a bit harder.
> 
> Or you could use a 3-bit Linear Feedback Shift Register; that gives you
> a 7-bit-long sequence automatically: just jam it to all-"1" to start
> and provide an output when all three flipflops are "1". 
> 
> Or use a 7-bit-long circular shift register. 
> 
> I like the LFSR myself: it's easy, fast, very efficient in terms of 
> hardware, and not used as much as it could be for applications like
> this. 
> 
> -- 
> Mike Andrews, W5EGO
> mikea at mikea.ath.cx
> Tired old sysadmin 
> ______________________________________________________________
> Lowfer mailing list
> Home: http://mailman.qth.net/mailman/listinfo/lowfer
> Help: http://mailman.qth.net/mmfaq.htm
> Post: mailto:Lowfer at mailman.qth.net
> 
> This list hosted by: http://www.qsl.net
> Please help support this email list: http://www.qsl.net/donate.html