[GPS_Standard] GPS Standard with 26MHz VCTCXO
Dave Platt
dplatt at radagast.org
Tue Nov 27 13:47:05 EST 2012
On 11/27/2012 04:46 AM, Bert, VE2ZAZ wrote:
> Hi,
>
> Indeed, the counter overflows 2441 times for each 16 second sample. The
> residual value that the FLL cares about is 26624.
>
> Now, note that 16MHz is right at the fringe of the maximum frequency
> permitted on the counter input (1/60ns or 16.6MHz). The spec actually
> calls for a 30ns high and a 30ns low. If you take into account the rise
> and fall times, you may not meet this requirement. In other words, it
> may work well with a square wave, but not with a sine wave. Something to
> keep in mind...
And, the original poster said 26 MHz, not 16 MHz.
Since this frequency is significantly faster than the PIC's
specification for the counter input, it seems to me that
a divider / prescaler is going to be necessary - not for
software reasons, but because the hardware itself can't handle
the higher rate.
A simple flip-flop acting as a 2:1 divider should work.
Porting the code to a different (faster) PIC chip might
remove this need, if there's one which is capable of
accepting a 26 MHz counter input.
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