[DSP-10] Problem wirh +10R

[Ton Bouw]

Hello Roger and group,

Thanks for the excellent advice. I quickly checked the wiring and indeed, I
had wired according to the QST article. I overlooked the info in
http://www.proaxis.com/~boblark/f11.gif
The +10R and +10T are now switching with HOME as expected.
Thanks again for your help !!!

73's,

Ton, PA0TBR


----- Original Message -----
From: Roger Hayward <rhayward@easystreet.com>
To: <dsp-10@mailman.qth.net>
Sent: 18 September, 2002 04:48
Subject: Re: [DSP-10] Problem wirh +10R


> Tom:
>
> I was going through this process over the last few weeks, so the
> debugging process is currently fresh in my mind.  I cannot tell from the
> posting whether or not you have run the diagnostic programs or not.  The
> unit's T & R status is indeterminate upon boot, so it will be useful to
> add the SR105 diode, then bring things up one stage at a time.
>
> Here are a couple of things that may be worth checking, somewhat in
> order for which they should be checked:
>
> * Add a diode "SR105" as per Bob's web page.  This is (anode) Base Q103
> to (cathode) Collector Q104.  This forces +10T to stay off when +10R is
> set.  Bob has plenty of good notes on this.
>
> * Verify you have swapped PF7 and PF6, the two serial enable lines.  The
> QST schematics, as they are shown, are backwards.  This really bit me,
> although I learned a ton of good things while debugging.  Again, Bob has
> a gif file that clarifies the wiring swap.
>
> * Go to Bob's web pages and use the UDIAG1 and UDIAG2 programs (if you
> haven't already).  UDIAG1 allows you to use a DVM to check the data,
> clock, and jam (enable) bits for both of the serial latch paths on the
> board.  Again, note carefully the swapping of PF7 and PF6.
>
> * UDIAG2 is extremely useful in programming both PLL's for normal
> operation, outside of the aspect of the control program on the PC.  Use
> this to get both PLL's up and running if you haven't already.  I had
> great success by breaking the PLL loops at R106 and R54, and then
> feeding each VCO with the wiper of a potentiometer (straddling +5V and
> ground).  With this setup, and a frequency counter, you can confirm
> whether or not each stage will even tune to 126 MHz or 19.68 MHz (as per
> the UDIAG2 settings).  Once you have the tuning coils adjusted, each PLL
> should lock in without any hassle.  Again, Bob's PLL discussion provides
> assistance on ideas of which coils to adjust, or which capacitors to pad
> up, etc.  All this worked fantastic with the "open loop" approach I took.
>
> I found it helpful to modify the UDIAG1 program to repeatedly program
> the serial latches in Figure 10 for values of my choice.  I used an
> oscilloscope to monitor the serial clock, data, and output-enable (jam)
> bits.  In addition, you can verify all output bits of U107 and U108 can
> be pulled high AND low (careful to not pull U108-Qb high when you're not
> expecting it, as you don't want to transmit while receiving!)  These
> were all good exercise which I'd highly encourage.
>
> Bob's notes are all referenced off of
> http://www.proaxis.com/~boblark/dsp10.htm .  If you're like me,
> book-mark it and put a link on the top of your browser (I suppose it
> could be your "home" page as well!)
>
> I hope this helps you out.  It's been a blast bringing this thing up in
> the last few weeks, even with the stumbling blocks I've hit.  Good luck
> and feel free to email offline if I can be of further assistance.
>
> 72.
>     Roger Hayward ARS KA7EXM
>     rhayward@easystreet.com
>     http://www.easystreet.com/~rhayward
>
>
>
>
>
> Ton Bouw wrote:
>
> >Hi there,
> >
> >I am busy testing my DSP-10 and I seem to have some problem.
> >It all checks out fine till I measure +10R, it's at 0V
> >PC operation appears ok, but I do have a msg "E30 PLL unlock".
> >I have been trying to solve the +10R issue first...
> >
> >After power up +10R is at 10V, it turns off when UHF3 starts up.
> >
> >During startup of UHF3.EXE I see activity on SERIAL DATA, SERIAL CLOCK
and DATA LATCH, the same activity is repeated when UHFA.EXE is started.
> >When I switch between Rx and Tx using HOME, I see activity on SERIAL DATA
and SERIAL CLOCK, but now DATA LATCH is always at 5V.
> >Is DATA LATCH s/w disabled when the PLL is not locked? Maybe there is no
lock because also initialisation of U104 went wrong?
> >
> >Thanks for any help.
> >
> >Ton, PA0TBR
> >
> >
> >
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