[DSP-10] : Analog Devices ADSP 2181Substitution

[ak0b]

>  a substitute for the ADSP2181? My reading of  John  Stephensen,KD6OZH's
> article in Sept/Oct  2002 issue of QEX  leads me to believe that  this
> might be
>  a cost effective replacement for the ADSP 2181.
>

Hi Ken,

I have not seen John's article yet, but you asked the right question and at
the right time for the current state of the technology.

Today, the problem is COST.    However, this should not be the primary
factor within a few months.

My firm has spent the last two and half years developing a reconfigurable
via software flight test module based on the Stratix FPGA.    We have over
eight man years of engineering in the design.  However, will let you know
just a few of the features:  First, it is really small, fits on a 3" X 2" 10
layer PCB.    We have a embedded configurable 32nd order filter for raised
sine pulse shaping of the output pulse so it can be used to key a MSK
transmitter, the output baud rate is software settable from 10 kbps to 10
mbs.   We have six different forms of PCM that are software settable.   In
addition, we have two RS-232 ports, one RS-422 port, two MIL-STD-1553 ports,
and 32 I/O lines that are photo isolated.   Analog we have embedded sigma
delta ports (8), plus a MUX port of 8 in lines.    All analog inputs are 12
bit and we have a couple of DAC output lines, again 12 bit.    The board has
a hardware boot processor and the Stratix FPGA has two embedded 16 bit RISC
processors.    The board also has a 1 Mbyte FLASH memory chip.  We
programmed the Stratix in VHDL and the boot processor and embedded
processors in C++.

Like I said the problem is cost.     The software tools for the design cost
over $20 K and we really needed another $10 K in tools in order to cut down
the development time.   You also need several high speed computers for the
design and simulation.  The first Stratix FPGA are not cheap we paid over a
$1 K for the first ones, but expect the price to drop to well under $50 next
year.

The main thing that will keep the average ham and  this type of design for
low volume ham applications is software development TOOLS, TOOLS, and TOOLS.
That is the key.   One can really (TODAY) develop just about any System on
Chip (SOC) design he can visualize in his mind.     The digital part is
totally reconfigurable, analog is still tough, but DSP filters one can do.
We are running 200 MHz clocks internally with a 80 MHz for the DSP work.
Several design skills are required, C++ and VHDL programming plus Math Lab
and DSP so its takes a small development team.

Yes you are on the right track, some of the old DSP chips however, will get
better and some of the newer FPGA will take over some of the functions where
digital processing is required with a touch of analog DSP.

73 de Stan AK0B   ak0b@swbell.net
Toxsor, Inc.