[Test-Equipment] Need to shift pulse up 5V

[David]

I have used this configuration a lot to level shift 3 or 5 volt logic
to a higher voltage and second the analysis of mr_cmos at verizon.net;
the emitter is pulled about 0.6 volts below ground and the collector
to emitter saturation voltage pulls the collector to about 0.3 volts
above the emitter so the output drops to -0.3 volts.  I have also seen
this used for converting from negative supply ECL to TTL/CMOS.

The one thing I would watch out for is noise margin; if the -5 to 0
volt logic driving the emitter of the transistor has significant noise
when at 0 volts, then this can show up at the output of the level
shifter.  I have a Tektronix DC505 universal counter which suffered
from this between the ECL and TTL counter stages and consider it to be
a circuit design flaw by Tektronix.  If this is a possibility, one
easy solution is to add a diode (or PNP emitter follower if so
inclined) or low voltage zener to the emitter circuit to double or
increase the noise margin.  My solution for the DC505 was to adjust
the filtering circuit Tektronix included which also had an error and
add a ferrite bead.

On Fri, 1 May 2015 14:05:48 -0400 (EDT), you wrote:

>I see it now.  I was thinking of it incorrectly.  When the NPN is conducting, the two equal-value resistors form a voltage divider between +5V and -5V and when it is not conducting, that point is seeing +5V so - non-inverting.
>
>One small point: doesn't the transistor's two diode-drops come into the equation effectively shifting that zero point when it is conducting?
>
>I have a handful of 2N3904s so I will be trying this soon and, I agree - definitely a more elegant solution than a comparator.
>
>BTW, these are strobe signals that set latches so not sure if an inverted clock would be okay but it might.  With a non-inverted pulse, though, I won't worry about it.
>
>Thanks again,
>Barry - N4BUQ