[Premium-Rx] The new R&S EM510 Direct-Sampling HF Receiver
Adam Farson
farson at shaw.ca
Sat Feb 17 01:49:43 EST 2007
Hi Pieter,
You are right - I missed a step in the reasoning. I was considering the
noise power in a bandwidth of 1/2 the sampling rate, and not taking DDC
process gain into account.
Thanks for the link to that excellent ADI article. It is a very concise
explanation of ADC S/N performance.
Cheers for now, 73,
Adam VA7OJ/AB4OJ
-----Original Message-----
From: Pieter Ibelings [mailto:sietetrescincoprimo at hotmail.com]
Sent: 16 February 2007 10:33
To: farson at shaw.ca
Cc: premium-rx at mailman.qth.net
Subject: RE: [Premium-Rx] The new R&S EM510 Direct-Sampling HF Receiver
This is the biggest misconception on ADCs. When your ADC is 16 bits, the
96dB number means that if you insert a signal at full scale (0dBfs), the
integrated noise over half the sample rate will be 96 dB down. In other
words, if you inject a signal of say 10dBm (assuming full scale is 10dBm)
and you are sampling at 100 MHz, then the noise will be broadband in nature
and will be -86dBm (96dB down) spread over the band of 0-50 MHz. If you set
the display to have a 1Hz resolution bandwidth, you will see the noise floor
at -86dBm-10*log(50MHz) = -163 dBm. This is equivalent to a noise figure of
the ADC of 11 dB. In this setup, I would be able to insert a carrier and see
it from about -163 dBm all the way to 10dBm on the display. So dynamic range
is not equal to S/N of an ADC which is calculated from the Effective Number
of bits (ENOB) multiplied by 6.02dB +1.76dB. The signal to noise numbers
above assumes that all of the noice is random in nature and caused by
quantization noise in the ADC.
Pieter, N4IP
Here is a link to an explanation:
http://www.analog.com/en/content/0,2886,760%255F%255F88014,00.html
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