[Premium-Rx] More on the HRO-600

James C. Garland 4cx250b at muohio.edu
Thu Mar 31 12:49:21 EST 2005


Hi Gang,
I'm still plugging away grying to reconstruct the synthesizer circuit of my 
HRO-600.  I'm using a circuit CAD package called CIRCAD which lets one 
import a photo of a circuit board and then construct the wiring diagram 
from the image.  Once I finish the project, I'll make the schematic diagram 
available on my website.

In the meantime, there's one more IC that I can't figure out. It's an 
MC1047P.  I thought I'd found all the ICs but didn't notice a couple of 
these chips lurking on the  board.  If anyone has any info on it, I'd 
appreciate it. I've looked far and wide for data, but so far to no 
avail.  I think it's probably from a late MECL II or an early MECL III family.

I've learned quite a bit about some of the early IC logic families, in the 
course of this project.  Here's an interesting little writeup on the 
history of the Motorola IC families. It was written by Mark Smotherman, and 
I found it on the web in a paper about early IBM systems:
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"The beginnings of emitter-coupled logic (ECL) actually go back to 1962. 
Motorola introduced MECL I in that year, and has since upgraded it with 
faster versions. This evolutionary process was matched by TI's drive to 
develop faster versions of its 54 / 74 family.

Standard 54 / 74 offered 10 nanosecond (typical gate-propagation delay) and 
10 milliwatts (typical gate-power dissipation). It was slower than MECL I 
(8 nanoseconds delay), but it consumed much less than the 31 milliwatts 
that a MECL gate did.

Succeeding versions of both the ECL and TTL families cut gate delays, 
though with an increase in dissipation. The top speed was reached in the 
late sixties when Motorola introduced MECL III. It offered 1 nanosecond 
gate delay and 60 milliwatt gate dissipation. However, MECL III didn't 
catch on. For many applications, the speed was too high to be useful 
without special and usually costly packaging techniques, nd the power 
dissipation was just too high.

The result was the 1971 introduction of MECL 10,000 (sometimes referred to 
as MECL II 1/2), which offered 2 nanoseconds delay and 25 milliwatts 
dissipation. Currently MECL 10,000 competes with a TTL version that uses 
Schottky clamping to achieve the fastest speeds in TI's 54 / 74 line. 
Called 54S / 74S, it boasts 3 nanoseconds delays and 20 milliwatts 
dissipation."
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Regards,

Jim Garland W8ZR





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