[Lowfer] Lowfer KE

[KA4SEY]

Yea if you wouldn't mind, I really appreciate that. I believe you said you had the ammeter as well? If you dont mind I think it could use it now that I've thought about it. It should really help me the most. For any other information please let me know. Thanks againKaseySent from my Verizon, Samsung Galaxy smartphone
-------- Original message --------From: jrusgrove at comcast.net Date: 11/22/20  7:13 AM  (GMT-05:00) To: "Discussion of the Lowfer (US, European, & UK) and MedFer bands" <lowfer at mailman.qth.net> Subject: Re: [Lowfer] Lowfer KE KaseyCan drop a couple 27 pF silver mica caps in the mail ... along with the resistors. Just say the word.Jay W1VD----- Original Message -----From: J D <listread at lwca.org>Reply-To: Discussion of the Lowfer (US, European, & UK) and MedFer bands <lowfer at mailman.qth.net>To: <lowfer at mailman.qth.net>Sent: 11/22/2020 2:26:24 AMSubject: Re: [Lowfer] Lowfer KE________________________________________________________________________________Kasey, it would appear from your schematic that a few components may be missing, thereby preventing your oscillator from being as stable as it needs to be. This same situation is found in a commercially made sorta-kit rig for 22 meters, and beacons using it there can often be identified by their tendency to wander or even outright jump around in frequency from day to day.A Pierce oscillator needs capacitance from both legs of the crystal to ground as part of a phase shift network. There is stray capacitance present, of course, without which it would not oscillate at all; but that is neither of sufficient magnitude nor stability to ensure reliable oscillation at the design frequency of the crystal. A good starting value for capacitors for a typical 3 MHz parallel resonant crystal would be 27 pF each.In addition, there needs to be a series resistor between pin 10 and the crystal. It serves three functions that each affect frequency stability to a certain extent: it isolates the crystal somewhat from the complex impedance of the gate output, it limits current and thereby power dissipation in the crystal, and it is part of the phase delay network. As a rough first approximation, I'd suggest 1 K, maybe as high as 2.2 K.Finally, the shunt resistance across the crystal could be a little higher in value for 3 MHz operation, such as 3.3 M to 4.7 M. It's not terribly critical, but it is preferable to operate it with as high a value as will allow for reliable startup. Lowering the operating Q of the crystal with a low parallel resistance could allow a crystal to jump too easily between primary resonance and any secondary resonance modes it may have.These comments are some basic rule of thumb guidance. For more detailed treatment of Pierce oscillators implemented with logic gates, I believe Crystek still offers this article:https://www.crystek.com/documents/appnotes/pierce-gateintroduction.pdfJohn Davis______________________________________________________________Lowfer mailing listHome: http://mailman.qth.net/mailman/listinfo/lowferHelp: http://mailman.qth.net/mmfaq.htmPost: mailto:Lowfer at mailman.qth.netPost must be less than 50KB total for message plus attachment!This list hosted by: http://www.qsl.netPlease help support this email list: http://www.qsl.net/donate.html______________________________________________________________Lowfer mailing listHome: http://mailman.qth.net/mailman/listinfo/lowferHelp: http://mailman.qth.net/mmfaq.htmPost: mailto:Lowfer at mailman.qth.netPost must be less than 50KB total for message plus attachment!This list hosted by: http://www.qsl.netPlease help support this email list: http://www.qsl.net/donate.html