[Lowfer] JFET (J310) Biasing

[JD]

Hi Clive,

I can't imagine how the third arrangement works effectively at all, so on 
the chance I'm missing something, I won't comment on it for now.  One does 
find a lot of really poor amplifier designs on the Web.  They may work in 
the builder's specific situation, but fall woefully short in terms of 
linearity, large-signal capability, noise performance, or some combination 
thereof.

Of the other two configurations, putting the gate directly at the center of 
the voltage divider effectively places the two resistors in parallel so far 
as the incoming signal is concerned, assuming the +12 rail is kept at ground 
potential for RF.  If high impedance is a design goal, it will be harder to 
achieve that way.  It also has the weakness of requiring the +12 rail to be 
VERY clean and thoroughly decoupled, or else noise pickup and/or feedback 
are possibilities.

My own designs are more like Roeloff's arrangement, except that I generally 
make the divider adjustable.  And, I capacitively decouple the tap of the 
divider to ground for sake of noise.

John