[Ham-Computers] RE: SATA

[kd4e]

Aaron,

    That is  very valuable and easily understood explanation - thanks 
for sharing it!

    Have you considered adding it to WikiPedia for the benefit of 
thousands of
others not on our list?

    A joy-filled and productive New Year to all!

73, doc KD4E
>
> Yes, parallel data paths are quicker overall than a single serial data path, but parallel busses have inherent problems primarily related to timing.  When you send data down a parallel bus, you need to make sure that every bit arrives at the exact same time - this is where the difficulties are comming in.  As bus speeds get higher, the maximum trace/cable length shortens.  Also, slight capacitance differences in each "wire" of the cable can delay the signal propagation of that one wire just enough to cause a timing problem (there's a specific word for this, but I don't remember what it is...something about latching, I believe).  In the past, it was simpler to design a parallel bus to be faster because bus speeds were slower.
>
> But, with today's technology, things are getting faster and cable lengths and tolerances are getting shorter/tighter.  It's already pretty difficult design parallel busses on motherboards because high bus speeds are bringing max trace lengths under 4 inches.  If you look carefully at DDR/2/3 memory modules, you'll notice that some traces zig-zag or spiral for no apparent reason - but this is to make sure that each bit arrives at the exact same time at the motherboard.
>
> If I'm doing my math right, the max cable length for 0 wait states on a 100MHz bus (ATA-5, aka UDMA-100) is about 10 feet (assuming a 100% velocity factor).  So let's say 6 feet for ATA-6/UDMA-133.  Factor in cable VF and connector capacitance and the cable can now be no longer than 3 feet.  Use a 50% factor to ensure timing can be accounted for and the max length is now 18 inches.  Hey, guess what...that's the actual ATA-6 spec of 18" max!
>
> Today's technology is able to run at very high speeds, but the inherent timing problems of a parallel bus now becomes a major roadblock.  Single-wire data-speeds of over 10GHz are possible, but trying to do this with a parallel bus is a nightmare.  So, using a serial bus and appropriate timing protocols, you can run a single wire at 10GHz (for example) and get the full 10GHz bandwidth out of that cable (minus overhead, of course).
>
> Current SATA specs run at 1.5Gbps and 3Gbps (I believe they are baseband, so 1.5GHz and 3.0GHz).  This would be a nightmare with a parallel bus, but pretty easy on a serial bus.  This is the primary reason for the switch to serial architecture.  But guess what, it's possible to "parallel" these serial datapaths to get "aggregate" bandwidth - I believe this is called "link aggregation".  For example, the PCI-Express bus uses serial data lanes - but, you can combine up to 16 lines for higher bandwidth.  PCI-Express x16 (16-lanes) is used by video cards and you'll find PCI-Express x4 (4-lanes) on server motherboards for high bandwidth controllers (hard drive and network).  Why isn't this called a "parallel" bus?  Because each serial "lane" is still transfering data independent of the others and a controller re-combines the aggregated data after-the-fact.  In essence, it's a parallel bus...just doesn't work like a classic parallel bus.
>
> Anyways, I hope this helps clarify things.  Serial buses are just easier to design at higher speeds.  But, in essence, you'll still find "parallel"-like architectures using multi-link serial connections.
>
> If you haven't done so already, Wikipedia has a good article that covers some of this (though it doesn't really explain the technological hurdles of a parallel bus).  On the bottom you'll find a chart comparing several of the most popular hard drive interface busses - the chart includes max speed, cable length, and number of devices supported.
>
> http://en.wikipedia.org/wiki/Serial_ATA
>
> 73,
>
>   - Aaron, NN6O
>   


-- 

Thanks! & 73, doc, KD4E
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