[GreenKeys] M28 ASR Print Issue

[Harold Hallikainen]

On Mon, June 3, 2024 6:01 am, Paul Heller wrote:
> It is confusing. My thought: Once the shaft with the cams starts spinning,
> timing is such that the start pulse plus 5 more pulses are read. After
> that, if there is no stop pulse to stop the shaft from spinning, it keeps
> reading pulses.
>
>
>
> 1. Wait for start. Start (0) comes; shaft starts spinning.
>
>
>
>
> 2. Wait 22ms, then read the next five bits at 22ms each.

Since step 1 is at the beginning of the start bit and we want to sample
data bits in the middle, I assume we sample the first data bit 33
milliseconds after the beginning of the start bit. In software uarts, I
detect the beginning of the start bit, then 11 milliseconds later, check
to see if we are still in space condition. If we are not still in space, I
reset the state machine since this appears to be a false start bit. If we
are still in space, I then wait 22 milliseconds to get the first data bit,
then 22 milliseconds for the next, etc. I sample the stop bit 22
milliseconds after I sampled the last data bit. If this is mark, the state
machine is reset to start waiting for the beginning of the next start bit.
If the stop bit sample is space, I increment my "bad stop bit counter" and
then wait for mark before resetting the state machine to wait for the
beginning of the start bit.

On the "mechanical uarts," once we detect the beginning of the start bit,
there's no going back. We do not detect false start bits. We detect the
first data bit 33 milliseconds after the beginning of the start bit. I
suspect the mechanical uart detects the stop bit and stops the shaft from
rotating 22 milliseconds after the last data bit. If we get a "false stop
bit" (samples as space instead of mark), the shaft just keeps rotating
into the next character as though a start bit was received.

In my DSP TU ( https://w6iwi.org/rtty/DspTU2/ ), there are counters for
valid start bits and valid stop bits. These are used to generate an error
report as to how many invalid characters we received (bad stop bit) versus
valid characters (good start bit). Of course, it's possible for one of the
data bits to be wrong and still have a good start and stop bit, but we
don't know what state each of the data bits should be in, but we do know
what the start and stop bits should be.

I recently added an RY count to the code that counts how many R characters
we received and how many Y characters. This is shown at
https://w6iwi.org/rtty/DspTU2/#RyCount:~:text=of%20153%20mA.-,RYcount .
It's a simple way to test demodulators with impaired audio (QSB, QRM,
etc.).

Harold
https://w6iwi.org