[GreenKeys] 8-Level TD?

[Jones, Douglas W]

On Nov 22, 2013, at 12:53 PM, Javier Albinarrate wrote:

> Have lemons? make lemonade
> Forget 8 bits, who needs them? Use 6 bits with 5 bits I/O.
> 
> 1- 6 bits architecture: 6 bits data 12 bits address

Note, just for fun, I have a 3-bit architecture available for you
to consider:
-- http://www.cs.uiowa.edu/~jones/arch/cisc/

This has only 8 instructions, and each instruction consists of
nothing but an opcode field -- no need for a data field.
This architecture can be made into a 6-bit architecture
by adding a 3-bit operand field to each instruction.

You're welcome to have fun with it.  It's a really really small
CPU, but the instruction set is wildly irregular, inviting
a microcoded implementation with a 16 word by 21-bit microstore.
How do you do that in relays?  Any ROM cabn be reduced using
Karnaugh maps to an optimal sum of products implementation, or
you can build electromechanical ROM.  Look at any teletype for
numerous examples of electromechanical encoders and decoders.

		Doug Jones
		jones at cs.uiowa.edu