[GPS_Standard] PIC Code question

[Bert, VE2ZAZ]

I could not have explained any better!

Bert, VE2ZAZ

----- Original Message -----
From: "Graham Haddock" <GrahamH at austin.rr.com>
To: <gps_standard at mailman.qth.net>
Sent: Sunday, February 24, 2008 5:10 PM
Subject: Re: [GPS_Standard] PIC Code question


Bob:

The counter representing the lower 16 bits of the overall count just
rolls over
(and over and over.) In fact, it will roll over about 152 times per second.
The information that could be captured in an upper counter stage for the
upper bits
is lost, but it doesn't really matter.  You are just interested in the
lower counter
bits anyway.

For instance, if you have an HP 10811 oscillator, you can only pull it
plus/minus
one half hertz at 10 MHz.  So, you assume that it is within one Hertz or so
of the intended 10.000000 Mhz.  You only examine the lowest digits on the
counter to see what the error is.

Or, think of it this way, it is like setting frequency using a counter,
and not
looking at the upper digits of the counter.  The lower digits tell you
everything
you need to know about the frequency error.  The upper digits tell you
the Megahertz of the incoming frequency, and you already know that, and
take it on faith that the oscillator is relatively close to where you
want it to be.

This circuit only cares about the error, not the absolute frequency.

--- Graham / KE9H

==


k7hbg at dslextreme.com wrote:
> Hi Everybody;
>
>  I am trying to understand what is going on in the processor in reference
> to the code it's running. I have a small knowledge of processors and was a
> bit stumped by the program flow diagram.
>  It looks like the VCXO output of 10 MHz is applied to a 16 bit counter in
> the processor and the count is allowed to accumulate for 16 seconds (GPS
> 1PPs) time. As I remember, a 16 bit counter can only hold a Max. count of
> FFFFHex or 65,535Dec. what happens to the rest of the bits above 65,535?
>
>  Bob, slowly going crazy(er), K7hbg
>
>
>
>
>
>
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