[Elecraft] FTDX5000 Design Flaw [typo]

[Wayne Burdick]

Typo: 

Change "...or in the case of PLL designs, VCOs with a much higher C/L ratio than the K3..."

to "...or in the case of PLL designs, VCOs with a much *lower* C/L ratio than the K3."

Wayne
N6KR


On Aug 31, 2014, at 7:17 PM, Wayne Burdick <n6kr at elecraft.com> wrote:

> Jim,
> 
> Thanks for your analysis of transmitted phase and keying noise of various transceivers. I'd like to provide a couple of technical details, and to give credit where it is due.
> 
> To achieve the excellent results shown in your paper for the K3, we used a combination of four techniques:
> 
> 1. A hybrid PLL/DDS synthesizer with a very high C/L ratio VCO: Many of the radios shown in your plots use unfiltered DDS for their VFO, or in the case of PLL designs, VCOs with a much higher C/L ratio than the K3. Both of these design decisions can increase phase noise and dynamic artifacts. To preserve a consistently high C/L ratio, we use up to 128 different C/L combinations as the VCO is band-switched. (This is in contrast to the usual 1, 2, or 3 VCO C/L ranges used in other rigs.) We also used very narrow-band crystal filtering of the DDS output to completely remove any of the usual spurs due to quantization, etc. John Grebenkemper assisted greatly with the synthesizer design.