[DSP-10] Intermittent PLL Lock Issue

[Rich Miller]

> 
> Hello Bob, Mike and Roger:
> 
> Thanks for responding to my inquiry. Just as a little background this DSP-10 has been built and worked for a couple of years.
> 
> After some troubleshooting here is what I have found using UDIAG2.exe (remove JP1 short and run: ezld 1 udiag2):
> 
> PLL DIAG all Voltages are Normal Except:
> 1. U104-7 = 1.9V
> 2. U7-11 = .04V
> 3. U107-3 = 0V (Low)
> 4. U107-7 = 0V (Low)
> 5. U108-2 = 0V (Low)
> 
> I then moved to the Serial Diagnostics. Here I remove the short from JP1 and load UDIAG1.exe using the same procedure as before. Once this is done I get the following:
> 
> FL0, FL2, PF7, and PF6 are all set to High. 
> 
> I suppose I need to start looking at the EZlite and DSPX board to troubleshoot now.
> 
> 73
> 
> Rich
> 
>> On Nov 25, 2015, at 10:43 PM, Bob Larkin <boblark at proaxis.com> wrote:
>> 
>> Hi Rich,
>> 
>> It is possible to measure the tuning voltage at the junction of C111, R104 and R105.  For diagnostics, it might be best to pick a midband frequency and set the tuning voltage around 3.5 volts. The full tuning range is roughly 1 to 5 Volts.
>> 
>> A few hints are at
>> http://www.proaxis.com/~boblark/dig_pll1.htm
>> 
>> The jumping characteristic would suggest the powdered iron core moving.  Be sure it is not out of the metal can.  There can be two tuning points and you want the one that is mechanically stable with the core far into the can.  You may need to cut/grind the core down in size.
>> 
>> After you are done, don't leave the voltmeter on the tuning voltage, as it will AC modulate quite badly!  But this is not a "lock" problem, normally, for measuring the voltage.
>> 
>> Let us know how it goes.
>> 
>> 73, Bob  W7PUA
>> 
>>> On 11/25/2015 05:01 PM, Richard Miller via DSP-10 wrote:
>>> All:
>>> I seem to be having a problem with the PLL. I am able to lock the PLL sometimes, and it will remain locked for a hour or two. Then for no real reason, the PLL will become unlocked. I am able to sometimes get it to relock by adjusting L102 for 127.335MHz when at 147MHz. This is not repeatable, and it does not always lock once again when adjusting L102 for the correct frequency. Once I achieve PLL lock, it will once again run for a few hours, and then come out of lock again.
>>> Anyone ever seen this issue? If so, what were your findings?
>>> Rich, AJ3G
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