[DSP-10] U107 Voltages
Bob Larkin
[email protected]
Sun, 07 Mar 2004 20:38:20 -0800
Hi Jiro and Steve,
I studied through the scope pictures and it looked like all the wave forms
were the right data. I totally forgot about the KDSP10 rise time situation.
On my KDSP10 board everything programs correctly, suggesting that it is
marginal! Thanks, Steve, for bringing this back up as I now remember the
previous discussion.
As I remember, the rise on the digital outputs was fine up to the 3 Volt
point or so, and above that it sort of drifted up to 4+. The addition of a
driver on the clock line, that is fast up to 5V, sounds like a fine
solution. But, perhaps it could be made to work adequately by adding a
resistor from the clock line to 5V. I do not know what value, but I will
experiment when I get a chance. Off hand, somewhere between 3.3K and 10K
might be enough. This could be added on the DSP-10 board, perhaps at F109.
What is apparently happening is that U107 and U108 are finding different
points on the clock wave form to switch at. If U108 switches slightly ahead
of U107, the output at U108-9 will already be the next value. There is a
slight delay on the pin 9 output built into the 74HC595 to minimize this
problem ( a pair of inverters on that output), and because of this the 595
is intended to be cascaded, as used in the DSP-10. Note that the rise time
of the "data" and "enable" lines should not be an issue, as they arrive
with large spacings from any other pulse.
I think it would be unpredictable to program around the glitch. I hope a
resistor provides at least a temporary fix for this!
Thanks again, Steve. Good luck Jiro, and let us know how it goes!
73,
Bob W7PUA
At 01:11 AM 3/7/2004, you wrote:
>Hello Steve,
>
>Thanks for the detailed description for your solution. I will try it
>when I get another 74HC14. BTW I am also interested in a "software fix"
>instead of a "hardware fix". The idea of the software fix is to modify
>the code in UHFA where a bit pattern is set for each of RF gain. For
>instance, What if '10001000' for RF gain 100 were replaced with
>'01000100'? I don't know if this works or not, but I am just curious.
>
>Jiro JQ2LMG
>
>On Sat, 6 Mar 2004 19:13:03 -0700, Steven Bible wrote:
> > Hello Jiro,
> >
> > The problem comes from the level shifters on the KDSP10 board (the
> > PI5C3245S). Level shifting takes time, and you see this in your o'scope
> > traces as sloping traces on the Serial Clock (FL2) and Serial Data (FL0).
> >
> > My solution was to use an additional 74HC14 DIP and piggy back it on top of
> > U3 on the KDSP10 board. Bend pins 1 through 6 and 8 through 13 pins
> > straight out from the package. Be careful not to stress the pin too
> much as
> > you bend it, they may break. Clip off the narrow part of the pin and leave
> > the thick part of the pin. Allow the power (pin 14) and ground (pin 7)
> pins
> > to stay the same, hanging down. Piggy back the 74HC14 to the top of U3 by
> > soldering the power (pin 14) and ground (pin 7) pins to the same on U3.
> > This provides power and groud to the top 74HC14.
> >
> > Connect a wire from P2-4 (FL2) on the KDSP10 to pin 13 of the piggy back
> > 74HC14. Connect a wire from pin 12 to 11. Connect a wire from pin 10 to
> > the through hole capacitor for FL2.
> >
> > Connect a wire from P2-3 (FL0) on the KDSP10 to pin 1 of the piggy back
> > 74HC14. Connect a wire from pin 2 to 3. Connect a wire from pin 4 to the
> > through hole capacitor for FL0.
> >
> > I appoligize for only words to describe the above solution. If you like, I
> > can take some photos and post them to a web page.
> >
> > Please let us know if this helps solve your problem.
> >
> > 73,
> >
> > - Steve, N7HPR
> > ([email protected])
>_______________________________________________
>DSP-10 mailing list
>[email protected]
>http://mailman.qth.net/mailman/listinfo/dsp-10