[DSP-10] PLL Problems

[Gérard Parat / F6FGZ]

Tan Teik Chuan a écrit :

> U7-11 shows a DC voltage and voltage at R54/U6-6 junction is at about 4.6V.
> So, 19.68 MHz PLL is locked.

Good !

> I've removed the ground from the junction R105/C113 so that it won't stay
> unlocked. I've tried to screw the L102 coil to the bottom, to the center,
> and even remove it. But, the voltage at R104/R105 junction is either at
> about 5V or about 6mV, can't get to the range between 4.7V and 0.3V. Is it
> something wrong with my board? Or it just couldn't lock with C117 being 10pF
> for my case?

Do you try to change frequency on UHFA display as I suggested ? You should find
with 10 pF some locking around 114 MHz which mean around 94 MHz on LO. However,
6.8 pF should bring your VCO in the 126 MHz range.

--
73 Gérard F6FGZ