AW: [DSP-10] Problems with DSP10 PLL lock

[Paul Kupper]

Hi Marius

You did not tell us if the unit was fine and running with the original =
EPROM or not.

- Be sure to run the software with a true DOS environment, not DOS in a =
window in Windows. (Might be the fault)
- If the EZ Kit lite board is not initializing the PLL IC's U7 and U104 =
properly, the PLL's are never achieving lock. I attached below a older =
message about this subject. But the problem was more sporadic than =
yours. However I could reproduce regularly the effect by using DOS in a =
Windows window.
- Pulses on the lock output on both PLL's are normal. There are filters =
to clean the signal from short duration pulses, so the DC level is =
restored. But when the pulse pause relationship is wrong, the outputs =
are signaling PLL unlock.
- Pin 3 of U8 has a DC voltage of 2.05 Volt in my unit. It seems that =
your U8 is drawing quite a low current (15mA), which is at the lower end =
of the specifications. (Looks like the search has to be started there)
- The EPROM must be faster than the slow old one's. I haven't looked at =
the specifications but 100 ns should be sufficient fast.

I hope the best for you, that you'll debug your unit soon.

73 de Paul HB9OMQ

Old E-Mail 13.12.2001

Hi Doug and all

I have to excuse me. I was much over enthusiastic yesterday when I wrote =
the e-mail about adding a pull up resistor to PIN 12 of the LMX1501. The =
truth is that this pull up won't change much.
The real bug comes from the shift register and LO frequency synthesizer =
programming. Normally there are 48 bit of data necessary to program all. =
Sometimes it happens, that only 16 or 32 bits are shifted out from the =
DSP. If the latch is closed with the wrong data, the synthesizer is =
programmed the wrong way and the VCO gets unlocked.
I've changed the DSP program to prevent this and almost everything is =
performing well. The change is as following:
Latch data to the sift registers and first LO frequency synthesizer only =
if there are 3 blocks of 16 bit data shifted out, else don't latch and =
throw away the data.
With this change, the PLL is locked as long as I stay within the tuning =
range. If I leave the tuning range the PLL gets unlocked but locks again =
when I tune back. The only drawback is that I don't know if the =
displayed frequency is correct with the hardware frequency. The =
frequency may be wrong one frequency increment. The next time when a =
correct tuning increment is shifted out; the VCO frequency catches up =
the displayed frequency. More research has to be done on this subject.
73 de HB9OMQ Paul

-----Urspr=FCngliche Nachricht-----
Von:	Marius Hauki [SMTP:la9eea@hotmail.com]
Gesendet am:	Montag, 5. August 2002 11:03
An:	dsp-10@mailman.qth.net
Betreff:	[DSP-10] Problems with DSP10 PLL lock

Hi DSP-10 list members.

I have progeammed the UHF3M21.HEX into a 27c512
eprom and inserted it (offset) into the eprom socket
of the EZ-kit since the 27c512 had fewer pins that the
memory chip that sat there originally.

When I run UHFA.EXE on the PC with the UHF3M21.HEX burnt in the eprom
I get an error msg  about the filter coefficients and that the filter =
design=20
is not available. When I try to download UHF3.EXE with EZFAST instead, =
then=20
the UHFA software starts to plot data and some data comes up on the =
spectrum=20
analyser display. Then there is at least data transmission between the =
DSP=20
and the PC going on it appears.

I get an error message from UHFA stating that there is a problem with =
PLL=20
lock (E30 PLL UNLOCK). The PC beeps a few times per second as well.

I have hooked on the scope to a few points on the 19.68 MHz VCO signal =
chain=20
and the output signal looks pretty messed up (distorted) after the U8 =
MMIC.=20
Before U8 the signal looks quite clean! I am starting to think that I =
have=20
killed the MMIC. It looks like the white dot is on the correct spot as =
well=20
(white dot =3D input). The DC voltages look a little strange as well =
compared=20
to what is described in the dsp-10 assembly manual. I measure 5.62 volts =
DC=20
on pin 3 of U8. The voltage is 10V on L29 and R61 is marked with 331 so =
it=20
looks like the resistor has the correct value as well.  I confirmed the=20
measurements with the spectrum analyzer. The harmonics is as strong as =
the=20
fundamentals coming out of U8.  The 10 MHz reference is present on both=20
plls.

The VHF LO looks quite clean by the way, and the harmonics are down. =
When I=20
look at the LD output from the U7 IC it has pulses on it. The LD output =
from=20
U104 also has pulses on it.

Does pulses on the LD outputs indicate unlock ?

Is there anoyone on the list that has experienced similar problems and =
can=20
give me a few hints ?

73 de LA9EEA
Marius





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